module timer(
	input clk_1Hz,
	input rst_n,
	output reg[5:0] minute,
	output reg[5:0] second
);
	
	always @(posedge clk_1Hz or negedge rst_n) begin
		if(rst_n == 1'b0) begin
			minute = 6'd0;
			second = 6'd0;
		end
		else begin
			if(second == 6'd59) begin
				if(minute == 6'd59) begin
					minute = 6'd0;
					second = 6'd0;
				end
				else begin
					minute = minute + 6'd1;
					second = 6'd0;
				end
			end
			else begin
				second = second + 6'd1;
			end
		end
	end

endmodule
